Revolutionising verification productivity with AI-driven platform

26-09-2022 | Cadence | Design & Manufacture

Cadence Design Systems, Inc has revealed the Cadence Verisium AI-Driven Verification Platform, a suite of applications employing big data and AI to optimise verification workloads, boost coverage and speed up root cause analysis of bugs. The platform is constructed on the new Cadence JedAI Platform and is natively integrated with the company verification engines.

The platform's release represents a generational shift from single-run, single-engine algorithms in EDA to algorithms that leverage big data and AI to optimise multiple runs of multiple engines across an entire SoC design and verification campaign. By deploying the platform, all verification data, including waveforms, coverage, reports and log files, are brought together in the JedAI Platform. ML models are built, and other proprietary metrics are mined from this data to facilitate a new class of tools that notably improve verification productivity. It can utilise the platform to unify its computational software innovations in data and AI across Verisium AI-driven verification to Cadence Cerebrus Intelligent Chip Explorer's AI-driven implementation and Optimality Intelligent System Explorer's AI-driven system analysis.

"AI and big data are transforming the world around us," said Paul Cunningham, senior vice president and general manager of the System and Verification Group at Cadence. "To realise this transformation in our core EDA business, we must build new technologies that optimise across multiple runs and engines. With the Verisium platform, we enter a new era of AI-driven verification built on the Cadence JedAI Platform. Our journey is just beginning, but users are already seeing dramatic improvements in their verification productivity and efficiency using the Verisium platform."

The platform is part of the company's verification full flow, which includes Palladium Z2 emulation, Protium X2 prototyping, Xcelium simulation, the Jasper Formal Verification Platform and the Helium Virtual and Hybrid Studio. The verification full flow produces the highest verification throughput of bugs found and root caused per dollar invested per day of project execution. The platform and verification full flow support the company's Intelligent System Design strategy, facilitating SoC design excellence.