Floating point DSP family delivers scalable performance

22-06-2021 | Cadence | Design & Manufacture

Cadence Design Systems has released the Cadence Tensilica FloatingPoint DSP family, which offers a scalable and configurable solution created specifically for floating-point-centric workloads. Optimised for power, performance and area, the new DSP IP cores stretch from small, ultra-low power to very high performance and are ideal for various applications. These range from energy-efficient solutions for battery-operated devices to AI/ML, motor control, sensor fusion, object tracking and AR/VR applications in the automotive, mobile, hyperscale computing and consumer markets.

The new family is composed of four cores: the Tensilica FloatingPoint KP1 DSP, the Tensilica FloatingPoint KP6 DSP, the Tensilica FloatingPoint KQ7 DSP and the Tensilica FloatingPoint KQ8 DSP. Early customer feedback has been positive, with evaluations demonstrating meaningful benefits in PPA.

“Floating-point numbers, common in technical computations, underpin a host of radar applications that process large or unpredictable data sets. We’ve successfully collaborated with Cadence on multiple generations of IP cores and are pleased to see them addressing this critical market need and expanding their proven Tensilica product line,” said Ian Podkamien, VP and head of Automotive at Vayyar Imaging. “FloatingPoint DSPs optimised for a variety of applications can enable Vayyar’s system-on-chip sensors to improve energy efficiency and performance across the automotive, elder care, smart home, retail, HLS, robotics and medical industries, among others.”

“Floating-point numbers are used widely in modern computations across a broad range of compute-intensive applications, and the need for floating-point processing is growing,” said Larry Przywara, senior group director, Tensilica marketing at Cadence. “Energy-efficient, cost-effective and high-performance DSPs designed specifically for floating-point-centric computation are critical for developing competitive and differentiated products. The scalable Tensilica FloatingPoint DSP family provides optimal PPA for these floating-point computations, regardless of the application. These DSPs are an example of how Cadence is applying our computational software prowess to hardware to solve our customers’ design challenges.”

These DSPs support the company's Intelligent System Design strategy by facilitating SoC design excellence. The Tensilica FloatingPoint KP1 DSP, Tensilica FloatingPoint KP6 DSP, Tensilica FloatingPoint KQ7 DSP and Tensilica FloatingPoint KQ8 DSP are all availability now.

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