New capabilities extend tuners’ performance and scalability

01-08-2019 | Silicon Laboratories Inc | Automotive Technologies

Silicon Labs has added new hybrid software-defined radio (SDR) tuners, increasing its portfolio to satisfy the growing demand of automotive radio manufacturers to support all global digital radio standards with a common platform. The new Si479x7 devices are the company’s first automotive radio tuners supporting the DRM standard. The tuners are an extension of their family of Global Eagle and Dual Eagle AM/FM receivers and digital radio tuners, giving the same excellent field performance, pin and package compatibility between single and dual tuners, and BOM cost advantages.

As well as introducing new DRM-capable tuners, the company is enhancing its Si4790x/1x/2x/5x/6x automotive tuners with unique 'SDR-friendly' technology, effectively converting these devices into hybrid SDR tuners. Their hybrid SDR technology incorporates advanced DSP-based automotive features such as MRC, AGC, Digital Radio Fast Detect and Dynamic Zero-IF (ZIF) I/Q. These features allow automotive radio manufacturers to support global digital radio standards with a standard radio hardware and software design. This flexibility enables OEM, and Tier 1 customers decrease design, qualification, sourcing and inventory costs while bypassing the complexity and inefficiency of supporting multiple automotive radio platforms.

“Silicon Labs’ automotive tuners with hybrid SDR capabilities deliver the highest integration and reception performance and the lowest BOM cost of any automotive SDR tuners in mass production today,” said Juan Revilla, general manager of Broadcast Products at Silicon Labs. “Our tuners with advanced digital radio features enable radio manufacturers to develop a single platform to demodulate and decode worldwide digital radio standards, greatly simplifying car radio designs and reducing system cost. A single digital radio platform can be achieved either with an SDR-based design approach or by using a tuner-plus-coprocessor design.”

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