SiFive RISC-V CPU to Power NASA’s Next Spaceflight Computer

20-09-2022 | By Robin Mitchell

Recently, NASA announced that the SiFive RISC-V CPU will be central to their next generation of spaceflight computers used to control spacecraft systems. What challenges does spaceflight present to electronics, what will the RISC-V platform provide, and what does this mean for RISC-V in general?

What challenge does spaceflight present to electronics?

When developing electronics for spaceflight, engineers are faced with an environment that is rather unique and difficult to design for. Space itself is a vacuum, meaning that the only method for heat dissipation is radiation, which introduces numerous thermal challenges. Space is also exposed to cosmic radiation, which can be extremely damaging to unprotected systems, and any devices in the path of a coronal mass ejection from the sun do not have the luxury of a magnetic field to protect them. 

To make matters worse, not only is space difficult to survive in but getting into space is a risky operation due to the high failure rates of rockets (even though rockets are mostly reliable, their failure rate is enough to cause engineers to hold their breath during launch). As such, engineers have to design spaceflight systems that are not only able to survive the harshness of space but also be highly reliable, as systems that fail in space are just as wasteful as failed launches. 

This need for reliability prevents the latest technology from being integrated into spaceflight systems as modern technology simply doesn’t have years of proven operation. This is why many spaceflight systems produced by NASA utilise the PowerPC architecture from well over 10 years ago, as it has millions of hours of error-free operation on numerous spacecraft that have all shown a high degree of reliability. In fact, this was one criticism that SpaceX faced when their dragon capsule made use of large touchscreens, as the technology hasn’t had the same degree of testing as toggle switches and large push buttons. 

NASA announces that SiFive RISC-V CPUs will be central in their next-generation spaceflight computers

Recognising the need to upgrade hardware, NASA recently announced that it will use the SiFive RISC-V CPU for its future High-Performance Spaceflight Computer (HPSC). The RISC-V microprocessor will be developed with the help of a $50 million contract with SiFive and Microchip, who jointly have experience in RISC-V development and radiation-hardened parts. 

The processor will replace the PowerPC-based BAE RAD750, which has seen more than two decades of service. While this does demonstrate the reliability of the RAD750, it also means that modern technologies are still yet to be integrated into spaceflight. 

The new design is expected to have 12 cores and will provide over 100 times the computing power compared to the RAD750. Furthermore, the new system will offer all kinds of energy features that will enable spacecraft to shut off unused systems to conserve power. Additionally, the use of new technologies will also allow AI and other intelligent systems to be integrated into next-generation rovers and spacecraft. 

Interestingly, the choice to use RISC-V didn’t come from its novelty as an open-source platform but because NASA believes that RISC-V will be heavily supported in the next few decades. It also noted that while PowerPC has proven to be an excellent platform, very few programmers are involved with its architecture, making it increasingly difficult to find new programmers.

What does this mean for RISC-V in general?

The fact that NASA believes RISC-V will see decades of development is an extremely positive sign for the future of RISC-V. The adoption by NASA will likely see more government funding in RISC-V to help develop its software base, and this could also lead to public projects, incentives, and possibly tax breaks for those utilising RISC-V (assuming the CHIPS act develops into a more generic semiconductor act).

At the same time, the adoption of RISC-V will undoubtedly get more engineers interested in  RISC-V development, and could even see individual makers designing their own RISC-V processors (considering that it has fewer than 50 instructions, it is more than possible for an individual to design their own processor implementation).

Overall, RISC-V clearly has a promising future, and as more government agencies adopt the ISA, the likelihood is that RISC-V will become a dominant processor as technologies continue to increase.