02-09-2021 | By Sam Brown
Recently, researchers from Taiwan developed a memory cell that combined optoelectronics with resistive memory. What challenges does current memory technologies face, what did the researchers achieve, and could optoelectronics be the answer to faster electronics?
Memory technologies play a critical role in modern computing, but most devices will deploy at least three different memory technologies. To start, static RAM is used inside CPU registers and cache to provide a high-speed solution that requires no refreshing. DRAM is used in main system RAM as it is cheaper than SRAM with relatively good speeds. FLASH or magnetic storage is used to store data for long periods when power is removed and is excellent for operating systems, applications, and settings.
While multiple memory technologies work, it creates problems that can be challenging for engineers to solve. To start, the use of numerous memory technologies requires designs that are fragmented with poor cohesion. This fragmentation also frequently sees designs spread over a large PCB area with different chips for different memory technologies.
Secondly, using different memory technologies can slow down system performance when data from permanent storage needs to be moved into the processor itself. In the case of non-volatile memory, such data needs to be first transferred across a bus to a memory controller. This is then transferred into RAM before it is transferred into the cache for actual processing.
The optimal solution would be a singular memory location (often referred to as universal memory) that stores everything from running applications to documents. However, no memory technology in existence can perform this role reliably; flash wears down too fast, hard drives are too slow, DRAM loses its contents on power-down, and SRAM is too expensive.
Recently, researchers from Taiwan have developed a new memory structure that combines resistive RAM with optoelectronics that can be written and read simultaneously. To start, resistive RAM was chosen as it provides non-volatile storage while being electrically erasable and writable. However, traditional resistive RAM can require complex circuitry to read from, which further reduces the performance of read operations.
To overcome this challenge, the researchers combined the resistive RAM cell with LEDs in a singular structure. Therefore, the resulting memory cell can be read using either an electrical read or an optical read where both operations are synchronised. While such devices have been manufactured previously, the research team created a combined memory cell in a singular structure that simplifies manufacturing, reduces the size, and reduces the complexity of the memory cell.
This combination was achieved using perovskite materials that allow for ion transport inside the crystalline structure itself. Furthermore, the memory cell produces different LED colours depending on the bit state of the memory cell during its write operation.
One significant advantage to a dual-read device is that it could allow for simultaneous reading and writing that do not interfere with each other. Therefore, read/write operations on a single memory location could be executed much faster without the need for prioritising bus usage (as the read is performed optically while the write is performed electrically).
Another area where such a device could become important is optical computing. As transistors approach their physical limits, so do their bandwidth capabilities. Light, however, can carry far more information as different wavelengths of light do not interfere with each other. For example, information on a single wavelength of light travelling through a fibre optic cable will not interfere with information on another wavelength).
Thus, creating computational devices using optical systems could create faster computers with higher bandwidth capabilities. Electronic components with optical interfaces would help create a bridge between optical and electronic parts. In the case of optical memory, DMA engines could be tied to such chips for ultra-fast data access across a network that doesn’t interfere with the internal operation of a server. This would give other devices the ability to peek into active memory without actually interfering with its operation.