Groundbreaking development of computer vision AI accelerator chip

10-08-2023 | Blueshift Memory | Semiconductors

Groundbreaking development of computer vision AI accelerator chip

Blueshift Memory, the designer of a novel proprietary high-speed memory architecture, has successfully completed a 13-month R&D project to demonstrate the performance of its Cambridge Architecture, which was funded by an Innovate UK Smart grant. The company is also showcasing at Flash Memory Summit the chip it developed during the project, which is an accelerator solution for computer vision (CV) AI-enhanced image recognition.

A paper will be presented at the Summit, illustrating the development of the RISC-V-based chip and documenting the accomplishment of acceleration by a factor of 16 to 128 times for processing image data, along with ultra-low power consumption.

When employed in a security camera monitoring a rapidly-evolving active shooter situation, for example, the chip can facilitate real-time identification of different types of firearms to trigger an alarm automatically. This capability could be a game changer and potentially save many lives.

The Cambridge Architecture has been developed to manage the Von Neumann Bottleneck – the phenomenon that data transfer between the core and the memory has become the limiting factor in computational speed. As computing tasks grow more data-hungry, it overcomes a growing obstacle to computational efficiency, and it also delivers huge energy savings by removing unnecessary movement of data.

“This is the first time that Blueshift Memory’s technology has been demonstrated in a real-life application, and the results are extremely promising,” said Peter Marosan, CTO and founder of Blueshift Memory. “We know that in more challenging, data-intensive use cases like servers for high-frequency trading, the Cambridge Architecture is capable of even higher levels of acceleration, up to 1000x or more, and this is the first step towards us reaching that market. This high performance will also be accompanied by dramatic energy savings, since moving large amounts of data around unnecessarily makes excessive demands on energy consumption.”

Flash Memory Summit, Booth 757, 8-10 August 2023. Sarmad Adeel, senior embedded design engineer at Blueshift Memory, will present a paper entitled, ‘Novel memory-efficient computer architecture integration in RISC-V with CXL’ in Session SARC-302-1 at 09:45 on Thursday 10 August.


By Seb Springall

Seb Springall is a seasoned editor at Electropages, specialising in the product news sections. With a keen eye for the latest advancements in the tech industry, Seb curates and oversees content that highlights cutting-edge technologies and market trends.