Dual-channel isolated gate driver ICs push performance envelope of SMPS designs

16-05-2023 | Infineon | Power

Infineon Technologies AG has released the next generation of the EiceDRIVER product family of dual-channel, galvanically isolated gate driver ICs to meet the latest design and application demands.

This family of products spans multiple UVLO variants, isolation levels, and package options to deliver a comprehensive solution for various applications. The new portfolio incorporates robust isolation technology that fulfils the latest isolation standards with outstanding electrical parameters to provide high efficiency and reliable operation across a broad temperature range, expanding the design's lifetime. These drivers can be employed in many applications, including server and telecom SMPS, solar inverters and energy storage systems, EV charging, motor drives and battery-powered applications, and high-performance computing.

Compared to its predecessor, the new gate driver IC generation includes DSO 14-pin packages for extended channel-to-channel creepage and provides dead-time and shoot-through protection and a faster UVLO start-up time. It is also supplied with robust isolation technology that fulfils the latest isolation standards (VDE 0884-11, IEC 60747-17). Also, it comes in highly compact LGA 4x4mm2 packages that provide a space-saving of up to 36% in low-voltage applications. One of the most significant improvements is the galvanic isolation incorporated into the gate driver ICs, which is now certified according to IEC 60747-17. This certification ensures these products are ready for 20 years of operation and satisfy the highest safety standards.

The shortened UVLO start-up time (2μs instead of 5μs) facilitates a faster SMPS start-up and stops the risk of mains power-transformer saturation. Furthermore, the new ICs possess a special output clamping circuit that implements an active output clamping approach to swiftly clamp the output noise even if the channel is 'inactive'. This is the most versatile approach to stop dangerous half-bridge shoot-through events throughout boot-strapped start-up while the gate driver supply is still below the UVLO on threshold.

The new devices provide configurable shoot-through protection and dead-time control built into their hardware. These second-level safety mechanisms offer added protection to assure safe and reliable operation. Also, the innovative packaging design incorporates removing unused pins, formerly declared to be 'no connects'. This feature allows higher channel-to-channel isolation ratings and supplies higher PCB layout flexibility, making it more straightforward for designers to develop their circuits.

By Seb Springall