New carrier board design training program accelerates knowledge transfer

03-03-2023 | Congatec | Test & Measurement

congatec has launched a new carrier board design training program to impart best practice knowledge on designing in leading Computer-on-Module standards COM-HPC and SMARC. The aim is to offer system architects a swift, simple, and efficient deep dive into the design rules of these PICMG and SGET standards. The training courses will guide engineers through the mandatory and recommended design requirements and best practice carrier board schematics for Computer-on-Modules. They will also empower developers to begin their own carrier board design projects. The knowledge transfer targets standard-compliant carrier board designs crucial to building interoperable, scalable, and durable customised embedded computing platforms. The academy will operate globally, providing online and on-premises courses, and aims at developers at OEMs, VARs and system integrators.

"The official design guides published by the standardisation bodies are a great resource, but ultimately, they are just requirement specifications. Developers must also learn how to best implement these fundamentals in the real world. We have set up the training program with the goal in mind to accelerate the knowledge transfer required to start such real-world development projects. At the end of the training, developers should be confident to have learned everything needed to start their own carrier board designs," explains Daniel Stadler, manager Support and Design-In at congatec.

With the new training program for carrier board designs, engineers get a kick-start into high-end embedded and edge computing – from PCB layout principles, power management rules, and signal integrity needs to component selection. Sessions with a special focus on computer interfaces will guide how to avoid pitfalls in the challenging design of high-speed serial communications – from PCIe Gen 5, USB 3.2 Gen 2 and USB 4 with Thunderbolt, via USB C and Ethernet up to 100GbE, including the management of sideband signals that must be deserialised on the carrier board for COM-HPC. Lastly, the course will explain how best practice designs use interface standards like eSPI, I²C, and GPIOs. An introduction of the company's x86 firmware implementation – ranging from embedded BIOS to Board Management Controller and Module Management Controller features – rounds off the design-in sessions. Lastly, there are sessions on verification and test strategies to tackle all challenges, from initial carrier board design verification to mass production testing.

The COM-HPC and SMARC carrier board design courses are a service of the training academy and need a service subscription. Each participant will automatically receive a certificate of successful participation, confirming that they have acquired the appropriate knowledge to become a carrier board design expert.


By Seb Springall