Expanded timing portfolio for high-performance communications

29-04-2021 | Renesas | Test & Measurement

Renesas Electronics Corporation has expanded its timing solutions portfolio with a new sub-100fs point-of-use clock solution for server, data centre, and network infrastructure markets. The new FemtoClock2 family incorporates ultra-low jitter clock generators and jitter attenuators in a small 4mm x 4mm2 package, facilitating cost-effective and easy clock tree implementation for next-generation, high-speed interconnect designs.


Providing best-in-class jitter as low as 64fs RMS, the device allows customers to simply satisfy next-generation PAM4 demands on new switch or router designs. With a 4mm x 4mm2 form factor, the family is less than one third the size of comparable solutions on the market. This enables designers to locate the clock source at the point of use – very close to the device receiving the clock signal – for streamlined PCB layout design, diminished cross-talk, and cleaner signals. Flexibility makes the family beneficial in many applications. It can be configured as a DCO, clock generator, or jitter attenuator, allowing valuable design flexibility and reuse.


“PAM4 technology is enabling a major leap in data transmission rates in both communications and data centre segments resulting in stringent requirement on the clock in such systems,” said Bobby Matinpour, vice president of Timing Products, Data Center Business Division at Renesas. “Expanding our popular FemtoClock lineup, Renesas offers a new high-performance family that delivers superior jitter performance with low power in a small form factor, enabling placement of the clock anywhere on the board at the point of use. This greatly simplifies the design by eliminating the additive jitter associated with the extensive clock routing on the board.”

Related product news