New 16 / 32Mb low-power SRAMs offer over 500 times more resistance to soft errors

22-07-2015 | Renesas | Semiconductors

Latest from Renesas are two new series of Advanced Low Power SRAM (Advanced LP SRAM), the leading type of low-power-consumption SRAM, designed to provide enhanced reliability and longer backup battery life for applications such as factory automation (FA), industrial equipment, and the smart grid. Fabricated using the 110-nanometer (nm) process, the RMLV1616A Series of 16-megabit (Mb) devices and the RMWV3216A Series of 32Mb devices feature an innovative memory cell technology that dramatically improves reliability and contributes to longer battery operation.

The recent demands for highly secure and reliable user systems are driving increased demand for highly reliable SRAM, which is used to store important information such as system programs and financial transaction data. The prevention of soft errors (Note 1) caused by alpha rays and cosmic neutron rays is a significant issue. Typical measures to deal with this problem include embedding an error correcting code (ECC) circuit in the SRAM or user system to correct any soft errors that occur. There are limits, however, to the error correction capabilities of ECC circuits. For example, some cannot correct simultaneous errors affecting multiple bits.

Renesas’ Advanced LP SRAM devices feature exclusive technology in their memory cells that achieves soft error resistance (Note 2) over 500 times that of conventional Full CMOS memory cells (Note 3). This makes it desirable for use in fields requiring high reliability, including FA, measurement devices, smart grid-related devices, and industrial equipment, in addition to many other fields, such as consumer devices, office equipment and communication devices, says the company.

The 16 Mb RMLV1616A Series is available in three packages: 48-ball FBGA, 48-pin TSOP (I), and 52-pin µTSOP (II). The 32 Mb RMWV3216A Series is available in a 48-ball FBGA package. Samples of the RMLV1616A Series and RMWV3216A Series will be available in September. Mass production of the two series is scheduled to begin in October 2015. Mass production using the 110 nm process has already begun for Advanced LP SRAM products with 4 Mbit and 8 Mbit capacities, says the company.

(Note 1) Soft errors:
A phenomenon that occurs when alpha rays and cosmic neutron rays from external sources impinge on the silicon substrate, generating an electric charge within the substrate that causes information stored in the memory to be lost. In contrast to hard errors such as physical faults in the semiconductor elements, which are reproducible, soft errors are not reproducible, so the system can restore the original state simply by rewriting the data. Generally speaking, the rate of soft errors increases as the fabrication process becomes more ultrafine.

(Note 2) Based on system soft error evaluations performed by Renesas.

(Note 3) Full CMOS memory cells:
A SRAM memory cell configuration in which a total of six P-channel MOS transistor and N-channel MOS transistor elements are formed on the same plane of the silicon substrate. The surface area is large and there is a latch-up risk.

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