Continuous rate clock and data recovery IC exceeds all required jitter specifications

07-04-2015 | Mouser Electronics | Semiconductors

Available now from Mouser, Analog Devices' ADN2917 continuous rate clock and data recovery IC is designed to provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 8.5Gbps to 11.3Gbps.

The ADN2917 automatically locks to all data rates without requiring an external reference clock or programming. ADN2917's performance exceeds all jitter specifications required by SONET/SDH, including jitter transfer, jitter generation, and jitter tolerance.

The design also provides manual or automatic slice adjust and manual sample phase adjusts. Additionally, the designer can select a limiting amplifier or equalizer at the input. The equalizer is either adaptive or can be manually set.

The receiver front-end loss of signal (LOS) detector circuit shows when the input signal level has fallen below a user-programmable threshold. The LOS detect circuit uses hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I²C registers. ADN2917 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate read-back features.

The ADN2917 is available in a compact 4mm × 4mm, 24-lead frame chip scale package (LFCSP). All ADN2917 specifications are defined over the ambient temperature range of -40C to +85C. Applications include SONET/SDH OC-192, 10GFC, 10GE & all associated FECs, XFP, line cards, clocks, routers, repeaters, instruments, and any rate regenerators/repeaters.

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