Strategic collaboration enables NVM chiplet solutions

As conventional monolithic chip designs grow in complexity and increase in cost, the interest and adoption of chiplet technology in the semiconductor industry also increase. Deca Technologies and Silicon Storage Technology (SST), a subsidiary of Microchip Technology Inc., have announced they have entered into a strategic agreement to innovate a comprehensive NVM chiplet package to enable customer adoption of modular, multi-die systems.

This collaboration combines Deca’s M-Series fan-out and Adaptive Patterning technologies with SST’s industry-leading SuperFlash embedded flash technology. The companies are applying their system-level integration expertise to provide a bundled offering that empowers customers to design, verify and commercialise NVM chiplets. By allowing greater architectural flexibility, the solution offers technical and commercial advantages over conventional monolithic integration.

The collaborative solution offers a modular, memory-centric foundation for advanced multi-die architectures, leveraging the strengths of both companies. The chiplet package leverages SST’s SuperFlash technology, along with the interface logic and physical design elements needed to function as a self-contained chiplet. This is paired with Adaptive Patterning-based redistribution layer (RDL) design rules, simulation flows, test strategies and manufacturing paths through Deca’s ecosystem of qualified partners.

Building on this foundation, the companies will jointly support customers from early design through qualification and prototype manufacturing. By streamlining integration and accelerating design cycles, the companies aim to enable wider adoption of heterogeneous integration, engaging with customers globally to bring chiplet solutions to market.

“Chiplet integration is reshaping how the industry thinks about performance, scalability and time to market,” said Robin Davis, VP of Strategic Engagements and Applications at Deca. “Our partnership with SST empowers customers to develop a chiplet solution that combines different chips, process nodes, sizes and even die from multiple foundries delivering more efficient and cost-effective products.”

Chiplet technology offers noteworthy advantages in semiconductor design and manufacturing by allowing a more-than-Moore approach. Designers can go beyond conventional scaling to deliver improved functionality and performance and get products to market faster. Chiplets will enable the reuse of existing IP and can facilitate the mixing of advanced process nodes with less expensive legacy geometries. By utilising the most appropriate die technology for a particular function, chiplets deliver a versatile, efficient and economical pathway for advanced semiconductor innovation.

“As our customers push the boundaries of Moore’s Law, they are expressing greater interest in chiplet-based solutions,” said Mark Reiten, vice president of Microchip’s licensing business unit. “This partnership aims to deliver a comprehensive package of IP, simulation tools and advanced assembly and engineering services necessary for successful chiplet development and productisation.”