Deal for anti-tamper IP on TSMC N4P including new electromagnetic sensor

Agile Analogue has announced a notable agreement with a major US tier 1 repeat customer to deliver its agileSecure suite of anti-tamper IP on the TSMC N4P process node, including its new EMI sensor.

The agileSecure portfolio of anti-tamper IP is designed to protect SoCs and addresses a critical industry need for robust hardware-level security, particularly for devices operating in sensitive applications on advanced process nodes.

According to Chris Morrison, VP product marketing at Agile Analog: "Hardware-based attacks are becoming increasingly sophisticated, making robust anti-tamper measures essential for any device handling sensitive data. With agileSecure, we are bringing together our customisable, multi-process anti-tamper IP with our new EMFI Sensor. This full suite of tamper detection and tamper prevention tools creates a powerful defence against physical security attacks and strengthens Agile Analog's position as a leader in on-chip security."

The company's tamper detection IP is a comprehensive collection of monitors designed to detect a wide variety of physical and side-channel attacks. The launch of the agileEMSensor, which detects Electromagnetic Fault Injection (EMFI) attacks, protects one of the most complex physical attack routes, complementing the company's existing tamper detection offerings that guard against voltage, clock and temperature attacks.

The company's range of tamper detection IP includes:

• agileVGLITCH: Voltage Glitch Detector
• agileCAM: Clock Attack Monitor
• agileTSENSE_D: Digital Output Temperature Sensor
• agileEMSensor: Electromagnetic Fault Injection (EMFI) Detector

In addition to the tamper detection IP, which provides enhanced protection over existing digital solutions for secure enclaves and RoT systems, the agileSecure portfolio includes a range of tamper prevention IP. This set of IP includes an internally biased LDO, bandgap reference and oscillator, as well as Power-on-reset and Power-ok circuits to secure critical circuitry from external attack further.

Chris Morrison continues: "Our deal with a major US-based tier 1 customer to provide all of our tamper detection IP and a selection of our tamper prevention IP on the TSMC N4P process node for their next generation communications SoC, highlights the importance of these agileSecure solutions, especially on the most advanced process nodes. This delivery also includes our agilePMON process ageing monitor IP and agileADC IP, a 12-bit analogue-to-digital converter, confirming the crucial role of resilient analogue IP in securing next-generation designs."

The Agile Analog team will be at the TSMC NA OIP Ecosystem Forum in Santa Clara on 24 September 2025 and the GlobalFoundries Technology Summit in Munich on 15 October 2025.