Infineon Technologies AG has released the CoolSiC MOSFETs 1200V G2 in a top-side-cooled (TSC) Q-DPAK package. The new devices deliver optimised thermal performance, system efficiency, and power density. They were specifically designed for demanding industrial applications that need high performance and reliability, such as EV chargers, solar inverters, UPS, motor drives, and solid-state circuit breakers.
The new CoolSiC 1200V G2 technology offers considerable improvements over the previous generation, enabling up to 25% lower switching losses for equivalent RDS(on) devices, thereby increasing system efficiency by up to 0.1%. Using the company's improved .XT die attach interconnection technology, the G2 devices achieve more than 15% lower thermal resistance and an 11% reduction in MOSFET temperature compared to G1 family products. The outstanding RDS(on) values, ranging from 4mΩ to 78mΩ, along with a wide product portfolio allow designers the flexibility to optimise system performance for their target applications. Furthermore, the new technology supports overload operation up to a junction temperature (Tvj) of 200C and provides high robustness against parasitic turn-on, ensuring reliable operation under dynamic and demanding conditions.
The CoolSiC MOSFETs 1200V G2 are available in two Q-DPAK configurations: a single switch and a dual half-bridge. Both variants are part of the company's broader X-DPAK top-side cooling platform. With a standardised package height of 2.3mm across all TSC variants – including Q-DPAK and TOLT – the platform provides design flexibility and allows customers to scale and combine different products under a single heatsink assembly. This design flexibility simplifies advanced power system development, making it easier for customers to customise and scale their solutions.
The Q-DPAK package improves thermal performance by allowing direct heat dissipation from the device's top surface to the heatsink. This direct thermal path delivers exceptionally better heat transfer efficiency compared to conventional bottom-side cooled packages, allowing more compact designs. Also, the Q-DPAK package layout design allows for minimised parasitic inductance, which is critical for higher switching speeds. This improves system efficiency and lowers voltage overshoot risk. The small footprint of the package supports compact system designs, while its compatibility with automated assembly processes simplifies manufacturing, ensuring cost-efficiency and scalability.
The CoolSiC MOSFET 1200V G2 in Q-DPAK single switch and dual half-bridge package variants are available now.