Renesas Electronics Corporation has launched the RZ/Five general-purpose MPUs constructed around a 64-bit RISC-V CPU core. The device employs the Andes AX45MP, based on the RISC-V CPU ISA. It augments the company’s previously available Arm CPU core-based MPUs, expanding customer options and giving more flexibility in the product development process.
“I am delighted that Renesas is among the first to announce a general-purpose MPU built around a 64-bit RISC-V CPU core from Andes,” said Hiroto Nitta, senior vice president and head of SoC Business in the IoT and Infrastructure Business Unit at Renesas. “With the introduction of the RZ/Five MPUs along with ecosystem support, Renesas is taking the lead in providing RISC-V solutions ahead of the market.”
“RZ/Five is the first general-purpose MPU on the market to be built around a 64-bit RISC-V core from Andes,” said Frankwell Lin, Chairman and CEO at Andes Technology Corp. “Andes has collaborated with Renesas first on the 32-bit RISC-V core and now on the 64-bit AX45MP, and I anticipate that this development will lead to the early adoption of customers’ devices in the global market built with Andes’ advanced RISC-V processor families.”
The company will provide a complete system solution for the RZ/Five CPU module including its DA9062 power management IC, 5P35023 programmable clock generator, AT25QL128A flash memory and SLG46538 GreenPAK IC implementing peripheral functions including system reset. These devices function together seamlessly in Winning Combinations, such as SMARC System for Single Core Cortex-A55 MPU, that can be employed as reference designs to lessen product development time.