As data centres transfer to greater bandwidth and faster infrastructure, the demand for higher performance timing devices becomes crucial. Four new 20-output differential clock buffers that better PCIe Gen 5 jitter standards for next-generation data centre applications are now offered by Microchip. The ZL40292 (85Ohm termination) and ZL40293 (100Ohm termination) are specifically designed to meet the new DB2000Q specification while the ZL40294 (85Ohm termination) and ZL40295 (100Ohm termination) are created to satisfy the DB2000QL industry standard. All are perfectly suited for next-generation servers, data centres, storage devices and other PCIe applications. These new devices also satisfy PCIe Gen 1, 2, 3 and 4 specifications.
Each buffer is an excellent addition to chipsets where distributed clocks are needed across several peripheral components, such as CPUs, FPGAs and PHYs in data centre servers and storage devices, together with various other PCIe applications. The devices’ low additive jitter of about ~20fs far exceeds the DB2000Q/QL specification of 80fs. This gives designers with big margins to satisfy tight timing budgets while delivering increasing data rates. These devices will reduce jitter when distributing clocks to up to 20 outputs, thereby sustaining the integrity and quality of the clock signal through the buffer.
“Microchip provides the broadest clock and timing portfolio in the industry and continues to develop solutions to address demanding next-generation networking applications, such as higher speed data centre and enterprise infrastructure,” said Rami Kanama, vice president of Microchip’s timing and communications business unit. “Customers who are seeking DB2000Q- and DB2000QL-compliant clock buffers can begin their designs now because of Microchip’s early introduction and the superior performance of PCIe Gen 5 devices, offering engineers greater design margins and peace of mind.”