New FPGA family, provides essential bridging and I/O expansion functions

Lattice Semiconductor has introduced the MachXO3LF as the newest member of its MachXO3 FPGA family, which provides essential bridging and I/O expansion functions to meet the increasing connectivity requirements of communications, computing, consumer and industrial markets. MachXO3LF devices come with on-chip Flash for configuration and usage. They utilize the same advanced package technology as the MachXO3L family, thus providing a small-footprint and the highest I/O density of any device on the market. The pin-out compatibility allows customers to easily migrate between MachXO3L and MachXO3LF devices without changing printed circuit board design. With the MachXO3LF devices, customers can get the benefit of FPGA design code changes during the engineering and development phase or during in-field design upgrades, and then easily migrate to lower cost MachXO3L devices when the design is finalized or an upgrade becomes unnecessary. The new MachXO3LF devices are supported by Lattice Diamond design software version 3.4.1 (and follow-on versions). The MachXO3 FPGA family of devices provides the ability for manufacturers to save costs with a variety of solutions, including MIPI CSI-2 image sensor interfacing, DSI LCD display interfacing, microprocessor interface expansion and system power sequencing, as well as performing numerous control functions. “The MachXO3 family has been tremendously received by both industry observers, and more importantly, the customers who use it to differentiate their products,” said Jim Tavacoli, senior director of marketing at Lattice Semiconductor. “The MachXO3LF device continues the evolution of the product line by providing more options for customers.” The MachXO3 FPGA family is widely successful in mobile, consumer, industrial, computation and communication applications. It has the lowest-cost per I/O, a small footprint, low power usage, high I/O count, high I/O density, low cost NVCM or Flash options for programming and configuration, driving the MachXO3 FPGA to be customer’s default choice for CPLD and low density FPGA devices, says the company.