PCIe Gen 6 controller IP offers full-featured protocol layer supporting diverse modes

SignatureIP has announced its new PCIe Gen 6 Controller IP that works from Gen 1 to Gen 6. It natively incorporates its recently announced iNoCulator tool to supply a high-speed interface for chip design to connect with peripherals seamlessly. It has been developed from the ground up so that there is no legacy code overhead, providing a very small footprint and an outstanding operating frequency of 1GHz for Gen 6 data rate. Its already low power consumption can be further reduced by clock and power gating in the power management unit.

Kishore Mishra, SignatureIP's CTO, explained: "As we have designed this from scratch, we have made it modular so that features can be added or deleted to exactly meet the customer's requirements and the configuration registers are implemented as a part of the IP. It has a layered architecture with PHY layer, Data link layer and Transaction layer as can be seen on the diagram. Trace and debug features are built in for rapid implementation so that the customer has a fast time to market."

The controller is provided as synthesisable RTL, along with a sample test bench and tests for easy implementation, as well as scripts for simulation, syntheses, and timing. As with all the company's products, full documentation is supplied for easy integration into a customer's design.