Leveraging RISC-V to simplify and speed the development of HLS applications

Bluespec, Inc. revealed its new Accelerate-HLS tool that streamlines and speeds the development of hardware operating HLS by offloading complex functionality that RISC-V processors can more effectively implement. Memory management – including address translation, coherence, and protection – is a complex, performance-critical necessity that is outside the expertise of the average designer and problematic for HLS designs. The tool eradicates this problem by supplying HLS designs with direct access to proven, high-performance memory management that is standard fare in modern RISC-V processors. The tool is available now for Siemens Catapult HLS.

As well as memory management, another key use case for the tool is hardware configuration and control, which is the source of most functional bugs but commonly very few performance bugs. Moving such functionality from HLS hardware to runtime software greatly decreases the time and effort to find, debug, and fix errors before and after a product's release. Memory management offload further enhances HLS productivity via faster and better HLS synthesis and timing convergence.

Accelerate-HLS supplies more than just RISC-V hooks into HLS. It also automatically generates the hardware-software stacks required to connect custom HLS designs to configurable RISC-V processors. This removes the time-consuming and risky manual hardware-software integration that is still common today.

"Accelerate-HLS connects two powerful technologies for competing in the post-Moore's Law era where differentiation is all about architectural innovation," said Charlie Hauck, CEO at Bluespec. "While Accelerate-HLS clearly enables RISC-V users to leverage HLS, it also demonstrates that fusing RISC-V with an EDA tool can significantly enhance the user experience without explicitly adopting RISC-V. We'll see much more of this as RISC-V penetrates EDA as it has silicon IP."

"Siemens' Catapult software for high-level synthesis helps system developers migrate functions from software to hardware to produce systems that run faster on much less energy. Bluespec's Accelerate-HLS is an enabling technology that simplifies this process," said Mo Movahed, general manager for High-Level Design Implementation and Verification Business Unit, Siemens Digital Industries Software. "We look forward to working with Bluespec to bring the combined benefits of Catapult and Accelerate-HLS to the marketplace."

The initial release supports Siemens' Catapult software for high-level synthesis and Bluespec RISC-V cores with coherent physical memory. Future releases will support coherent virtual memory, Linux, multi-core, third-party RISC-V cores, and memory-mapped accelerators for Arm processor subsystems.