Technology for creating power-efficient AI processing for Edge solutions

09-02-2022 | SureCore | Semiconductors

sureCore has revealed its new technology for in-memory computing called CompuRAM. This will allow solutions for computing at the Edge to be more power-efficient. At present, sensor data frequently must be sent from an IoT device to a server for processing, which produces a connectivity requirement and an unavoidable latency. This is not satisfactory for time-critical applications, so there is a drive to do more computation within the device itself, i.e., AI processing at the Edge. Power is a important design constraint in IoT devices, and so any extra AI-related computation must be accomplished in a power-efficient way. The company’s existing low-power memory solutions already deliver a way to add the significant additional memory required by AI applications without dramatically increasing power needs. In-memory computing delivers further power savings by decreasing the requirement to move large amounts of data around within a chip, as the initial processing of data is carried out very close to the memory array itself.

Tony Stansfield, sureCore’s CTO, explained: “Our intimate knowledge of memory technology means that we have been able to create a solution for the next technology demand of integrating arithmetic operations within the memory. It is another example of us seeing what the industry will require in the near future and developing a solution that will be ready when the need for AI at the Edge becomes mainstream. Cutting power consumption is what we do, as we have proven with our existing technologies, such as our EverOn and PowerMiser SRAM families, that enable near-threshold operation and 50% dynamic power cuts, respectively. Our solutions are all designed to make it possible to create products for the next generations of ultra-low-power applications that could not exist without their power reducing techniques.”

In the same way that on-chip memory is better, faster and more power-efficient than transporting data back and forth to off-chip memory, integrating memory and compute capability delivers even more noteworthy power-saving benefits. Its in-memory compute technology accomplishes this integration by embedding arithmetic capability deep within the memory array in a way that is compatible with its existing silicon-proven, low-power memory design.

By Natasha Shek