Silicon capacitor supports the highest performance demands of PDNs

25-06-2021 | Murata | Passives

Murata has increased its products for the mobile and high-performance computing markets with its latest silicon process technology to fabricate silicon capacitors with a density of 1.3µF/mm². The remarkably low ESL (few pH) and low ESR (few mOhm) of these devices bolster the highest performances of new power distribution networks (PDN) that demand low impedance over an extensive frequency bandwidth.


As digital ICs develop to provide more features at lower voltages, solving issues like noise and voltage fluctuation is crucial. Its <40µm profile allows chip designer engineers to embed the silicon capacitor into the package as close to the active die as possible, reducing the current’s effective path length and, thereby, decreasing parasitics.


These multi-terminal devices provide the various SoC and microprocessor design demands for multiple terminal capacitor networks. Replacing traditional monolithic ceramic capacitors with multi-terminal silicon devices decreases the entire quantity of capacitors needed on the board dramatically, which increases the compactness of the end design. Fewer capacitors also offer total savings in both BOM and mounting costs.

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