Ultra-low-noise compliant clock jitter cleaner with dual loop

The Texas Instruments LMK04832 is an ultra-high performance clock conditioner with JEDEC JESD204B support. The device is also pin-compatible with the LMK0482x family of devices. The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices using device and SYSREF clocks. SYSREF can be implemented using both DC and AC coupling. Not only limited to JESD204B applications, each of the 14 outputs can be independently configured as high-performance outputs for conventional clocking systems. The device can be configured for running in dual PLL, single PLL, or clock distribution modes with or without SYSREF generation or reclocking. PLL2 can operate with either internal or external VCO. The high performance coupled with features like the capability to trade-off between power and performance, dynamic digital delay, dual VCOs, and holdover make the device perfect for giving flexible high performance clocking trees.