Will Intel's Expensive Push Into Programmable Logic be a Buck to Far?

10-06-2015 | By Paul Whytock

Financially Intel is no slouch, with its market capitalisation of close to $148 billion, but the amount it’s paid to get its hands on Altera’s programmable logic expertise is serious stuff.

You’ve got to want something very badly to splash out close to $17 billion for it. You’ve also got to be pretty sure it’s not going to be wasted money that will eventually disappear down the drain, although, with Altera’s latest Stratix developments, that’s unlikely. But more about that later.

Intel may be the world’s largest supplier of microprocessors (MPUs), with semiconductor revenues nearing $50 billion in 2014 and MPUs making up 80% of that, but its once-lucrative PC and tablet markets are slowing down.

Intel also supplies chip solutions to other markets

Key amongst these are data centres and communication systems. And there is little doubt that having its own FPGAs will strengthen Intel’s server offerings which is a big money earner for the chip maker.

Combining server chips with FPGAs, which will handle search, sorting and character-matching applications, is a no-brain move for Intel. And let’s not forget the omnipotent IoT market, which is already a prolific consumer of FPGA technology and can only get even more edacious.

No doubt Intel’s competitors have viewed its purchase of Altera with a mixture of competitive concern tinged with schadenfreude-laced admiration.

But let’s not forget there are other very capable providers of programmable logic technology, so don’t be surprised if the likes of Xilinx or perhaps Microsemi suddenly attract big buyers looking to stay in the game against Intel.

Has Intel made the right financial move in buying Altera?

I say yes. And no doubt Intel will have liked what Altera recently launched at a press conference in London when it announced architectural and product details of its Stratix 10 FPGAs and SoCs, its next generation of high-end programmable logic devices.

These use Altera’s HyperFlex FPGA fabric architecture built on the Intel 14nm Tri-Gate process to provide 2X higher core performance over previous generation FPGAs.

The HyperFlex architecture introduces registers throughout all core interconnect routing segments, letting designers eliminate critical paths and routing delays. The ability to achieve 2X higher core logic performance also enables considerable improvements in device utilisation and power by reducing the need for very wide data paths and other skew-inducing design constructs.

The HyperFlex architecture enables high-performance designs to operate at up to 70% lower power by reducing logic area requirements.

All Stratix 10 FPGA and SoC family members use heterogeneous 3D SiP integration to integrate a high-density monolithic FPGA core fabric (up to 5.5M logic elements) with other advanced components. A monolithic core fabric maximises device utilisation and performance by avoiding the connectivity issues of competing for homogeneous devices that use multiple FPGA dies to deliver higher densities. Altera’s heterogeneous SiP integration is enabled through the use of Intel’s proprietary EMIB (Embedded Multi-die Interconnect Bridge) technology.

All densities in the Stratix 10 family will be available with an integrated 64-bit ARM quad-core Cortex-A53 hard processor system (HPS).

The family will feature comprehensive security capabilities. At its core is a Secure Design Manager (SDM), which delivers sector-based authentication and encryption, multi-factor authentication and physically unclonable function (PUF) technology.

So all-in-all, Intel has bought its way into some very impressive FPGA and SoC technology that it can use to fully exploit rapidly expanding market sectors, which will ease the fiscal pain of de-accelerating PC and tablet markets. It has also potentially created considerably more work for its fabs.

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By Paul Whytock

Paul Whytock is Technology Correspondent for Electropages. He has reported extensively on the electronics industry in Europe, the United States and the Far East for over thirty years. Prior to entering journalism, he worked as a design engineer with Ford Motor Company at locations in England, Germany, Holland and Belgium.